Title :
New high-speed monolithic operational amplifier
Author :
Narayanamurthi, E.S.
fDate :
4/1/1971 12:00:00 AM
Abstract :
The limitations in the design of such amplifiers are reviewed. The stage-by-stage design of a four-stage operational amplifier with primary emphasis on speed without sacrifice of d.c. performance is presented. The layout and connection of the internal capacitor used for improvement of the frequency response are discussed. The a.c. performance and time-domain response are presented.
Keywords :
Monolithic integrated circuits; Operational amplifiers; monolithic integrated circuits; operational amplifiers; Bit rate; Bonding; Circuit noise; Degradation; Delay lines; Feeds; Frequency; Operational amplifiers; Semiconductor device noise; Ultrasonic transducers;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1971.1049653
