DocumentCode
871119
Title
Design of Integrated Selection and Recirculation Circuitry for a High-Speed, Low-Power, Magnetic Thin-Film Memory
Author
Ohnigian, S. ; Weilerstein, I.M. ; Murray, D.E. ; Solomon, J.
Volume
1
Issue
1
fYear
1966
Firstpage
63
Lastpage
69
Abstract
The circuit design for a high-speed, low-power, magnetic thin-film memory is described. The modest operating-current requirements of the memory element, 50 milliampere word currents and 40 milliampere bit currents, permit the use of integrated selection and recirculation circuits. The selection system uses one transistor per word line and has a matrix array of word drivers and word switches to select one word line. Word current rise time is 2 to 3 nanoseconds. The 1-millivolt readout signal, 6 nanoseconds in duration, is amplified by means of a high-gain (1400), wide-band (50 Mc/s) sense amplifier with a differential input stage. Information is written into the memory with a bit driver which generates 40 milliampere current pulses of either polarity. Design considerations such as the ac coupling in the sense arnplifier, the relation between amplifier internal noise and system mean free time between errors, and the minimization of noise are discussed. A variety of transistor geometries was used to optimize the devices to the individual circuit functions. These geometries are illustrated.
Keywords
High-speed integrated circuits; Low power circuits; Memory architecture; Thin film transistors; Transistors; Broadband amplifiers; Circuit noise; Circuit synthesis; Differential amplifiers; Driver circuits; Geometry; Magnetic circuits; Magnetic films; Pulse amplifiers; Switches;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1966.1049758
Filename
1049758
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