DocumentCode
871392
Title
Logic Upset Level of GaAs SRAMs for Pulsed Ionizing Radiation
Author
Notthoff, J.K. ; Zuleeg, R. ; Troeger, G.L.
Author_Institution
McDonnell Douglas Microelectronics Center Huntington Beach, CA 92647
Volume
30
Issue
6
fYear
1983
Firstpage
4173
Lastpage
4177
Abstract
The first pulsed ionizing radiation logic upset measurements on GaAs 256-bit static RAMs are reported and analyzed. The circuit design utilized GaAs enhancement junction field-effect transistors (E-JFETs) with resistive loads and direct-coupled field-effect transistor logic (DCFL). The test results demonstrated upset levels for the most sensitive cells in the range of 6 Ã 109 to 1 Ã 1010 rad(GaAs)/s. All evaluated memories contained a core of hard memory cells which retained their logic state up to a dose rate of 3 Ã 1011 rad(GaAs)/s. A tentative model for memory state upset is presented, which includes the semi-insulating substrate currents generated by ionizing radiation and predicts the observed behavior of the static RAMs tested.
Keywords
Circuit synthesis; Circuit testing; FETs; Gallium arsenide; Ionizing radiation; Logic circuits; Logic design; Predictive models; Pulse measurements; Random access memory;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1983.4333103
Filename
4333103
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