Title :
Calculation of steady-state errors in digital-to-analogue ladder convertors
Author :
Donaldson, R.W. ; Chan, Daniel
Author_Institution :
University of British Columbia, Department of Electrical Engineering, Vancouver, Canada
fDate :
5/1/1967 12:00:00 AM
Abstract :
A method for calculating least upper bounds on the magnitude and variance of the steady-state analogue voltage error in digital-to-analogue ladder convertors in presented. Tight bounds on the magnitude and variance of the error are calculated as a function of resistor tolerance, steady-state voltage source error and number of bits decoded.
Keywords :
digital-analogue conversion; signal generators;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19670162
