DocumentCode :
873192
Title :
Householder CORDIC algorithms
Author :
Hsiao, Shen-Fu ; Delosme, Jean-Marc
Author_Institution :
Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume :
44
Issue :
8
fYear :
1995
fDate :
8/1/1995 12:00:00 AM
Firstpage :
990
Lastpage :
1001
Abstract :
Matrix computations are often expressed in terms of plane rotations, which may be implemented using COordinate Rotation Digital Computer (CORDIC) arithmetic. As matrix sizes increase multiprocessor systems employing traditional CORDIC arithmetic, which operates on two-dimensional (2D) vectors, become unable to achieve sufficient speed. Speed may be increased by expressing the matrix computations in terms of higher dimensional rotations and implementing these rotations using novel CORDIC algorithms-called Householder CORDIC-that extend CORDIC arithmetic to arbitrary dimensions. The method employed to prove the convergence of these multidimensional algorithms differs from the one used in the 2D case. After a discussion of scaling factor decomposition, range extension and numerical errors, VLSI implementations of Householder CORDIC processors are presented and their speed and area are estimated. Finally, some applications of the Householder CORDIC algorithms are listed
Keywords :
VLSI; digital arithmetic; parallel algorithms; Householder CORDIC algorithms; VLSI implementations; matrix computations; multidimensional algorithms; multiprocessor systems; scaling factor decomposition; Computer errors; Convergence; Digital arithmetic; Digital signal processing; Iterative algorithms; Matrix decomposition; Multiprocessing systems; Reflection; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.403715
Filename :
403715
Link To Document :
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