Theory and design of MOS capacitor pull-up circuits

Capacitor pull-up circuitry is another addition to the numerous techniques the MOS engineer has available as a design tool. This `ratioless´-type circuit offers the potential advantage of high-speed two-phase operation. A complete circuit description and analysis is presented. Included in the analysis are topics covering bipolar injection effects, calculation of optimum size devices, stair-step charging wave forms that have been observed, and overlap capacitance effects. Measured speed performance is below the predicted value and the discrepancy appears to be caused by minority carrier injection into the substrate.