DocumentCode
874964
Title
50 Gbit/s 2:1 multiplexer in 0.13 μm CMOS technology
Author
Kehrer, D. ; Wohlmuth, H.D. ; Wurzer, M. ; Knapp, H.
Author_Institution
Corporate Res., Infineon Technol., Germany
Volume
40
Issue
2
fYear
2004
Firstpage
100
Lastpage
101
Abstract
A fully integrated 2:1 multiplexer IC which operates at up to 50 Gbit/s data rate is presented. The MUX uses inductive shunt peaking and an output series inductor for higher bandwidth. The MUX directly drives the 50 Ω load. The IC is fabricated in a 0.13 μm bulk CMOS technology and draws 65 mA at 1.5 V supply voltage. The output voltage swing is 2×100 mV.
Keywords
CMOS integrated circuits; integrated optics; multiplexing equipment; 0.13 μm CMOS technology; 0.13 micron; 1.5 V; 50 Gbit/s; 50 Gbit/s 2:1 multiplexer; 50 ohm; 65 mA; inductive shunt peaking; output series inductor;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20040090
Filename
1263094
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