DocumentCode
875001
Title
Design considerations for a high-speed bipolar READ-ONLY memory
Author
Barrett, John C. ; Bergh, Arndt ; Hornak, Tomas ; Price, John E.
Volume
5
Issue
5
fYear
1970
fDate
10/1/1970 12:00:00 AM
Firstpage
196
Lastpage
202
Abstract
See abstr. B25059, C13760 of 1970.
Keywords
Integrated circuits; integrated circuits; Application software; Costs; Decoding; Delay; Design optimization; Energy consumption; Logic; Power dissipation; Read only memory; Switching circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1970.1050113
Filename
1050113
Link To Document