DocumentCode
875175
Title
The total delay fault model and statistical delay fault coverage
Author
Park, Eun Sei ; Mercer, M. Ray ; Williams, Thomas W.
Author_Institution
Electron. & Telecommun. Res. Inst., Daejon, South Korea
Volume
41
Issue
6
fYear
1992
fDate
6/1/1992 12:00:00 AM
Firstpage
688
Lastpage
698
Abstract
Delay testing at the operational system clock rate can detect system timing failures caused by delay faults. However, delay fault coverage in terms of the percentage of the number of tested faults may not be an effective measure of delay testing. A quantitative delay fault coverage model to provide a figure of merit for delay testing is presented. System sensitivity of a path to a delay fault along that path and the effectiveness of a delay test are described in terms of the propagation delay of the path under test and the delay defect size. A new statistical delay fault coverage model is established. A defect level model is also proposed as a function of the yield of a manufacturing process and the new statistical delay fault coverage. A new delay testing strategy driven by the defect level for delay faults is proposed
Keywords
logic testing; defect level model; delay fault coverage; delay fault model; delay faults; delay testing; statistical delay fault coverage; Circuit faults; Circuit testing; Clocks; Delay effects; Delay systems; Fault detection; Logic testing; Propagation delay; System testing; Timing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.144621
Filename
144621
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