DocumentCode :
875489
Title :
Thirty Megarad CMOS Gate Array for Spacecraft Applications
Author :
Voss, Henry D. ; Roffelsen, Larry ; Hardage, Charles ; Jones, Frank C.
Author_Institution :
Lockheed Palo Alto Research Laboratory, Palo Alto, CA. 94304
Volume :
31
Issue :
6
fYear :
1984
Firstpage :
1364
Lastpage :
1367
Abstract :
The recent development, testing, qualification and integration for spacecraft applications of a general purpose, 30 Megarad-hard, CMOS logic gate array having 3000 transistors is reported. Fabricated on the National Semiconductor, Inc. class S radation-hard line, the gate array operates at > 3 MHz (10V) after 107 rad(Si) total dose from a Co60 source. The threshold voltage change is 0.2 volts (0.5 volts) for the n-channel (p-channel) devices under 10V bias conditions. The rad-hard process of the CDI gate array family is mask compatible with the conventional process for cost effective semicustom design. The rad-hard array is presently operating in-orbit on the AMPTE satellite and is planned for instruments to be flown on the CRRES and UARS satellites.
Keywords :
CMOS logic circuits; Logic arrays; Logic devices; Logic gates; Logic testing; Qualifications; Radiation hardening; Satellites; Space vehicles; Threshold voltage;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1984.4333512
Filename :
4333512
Link To Document :
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