• DocumentCode
    875606
  • Title

    Super Recovery of Total Dose Damage in MOS Devices

  • Author

    Johnston, Allan H.

  • Author_Institution
    Boeing Aerospace Company Seattle, Washington 98124
  • Volume
    31
  • Issue
    6
  • fYear
    1984
  • Firstpage
    1427
  • Lastpage
    1433
  • Abstract
    Super recovery of the gate threshold voltage has been observed for several types of commercial NMOS integrated circuits. These devices have characteristic recovery times that are as much as four orders of magnitude shorter than those reported for hardened oxides. Since these fast recovery times are comparable to the irradiation times used in conventional total dose facilities, their failure levels are strongly affected by the dose rate used for testing. An empirical model has been developed that predicts the general features of super recovery, and can be used to calculate the dependence of circuit failure levels on dose rate.
  • Keywords
    Circuit testing; Interference; Large scale integration; MOS devices; Measurement techniques; Microprocessors; Particle measurements; Predictive models; Threshold voltage; Time measurement;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1984.4333524
  • Filename
    4333524