Title :
Voltage Source Converter Modeling for Power System State Estimation: STATCOM and VSC-HVDC
Author :
De La Villa Jaén, Antonio ; Acha, Enrique ; Exposito, A.G.
Author_Institution :
Dept. of Electr. Eng., Univ. of Seville, Sevilla
Abstract :
This paper presents new models of voltage source converters suitable for power system state estimation comprising STATCOM and VSC-HVDC applications. Both the back-to-back and the point-to-point VSC-HVDC variants are addressed. The state estimation models include DC measurements and converter control inputs resulting in an overall, seamless combination of the AC and DC devices or networks, in addition to providing for a higher degree of redundancy. Following a detailed description of all the relevant variables involved in the problem, taking into account equality constraints associated with both equipment and operation, a recommended set of state variables is proposed. These new models allow internal power losses of voltage source converters to be considered, leading to increased accuracy. The IEEE 14-bus system is used to illustrate and compare the main features of the proposed models.
Keywords :
HVDC power convertors; power system state estimation; static VAr compensators; IEEE 14-bus system; STATCOM; VSC-HVDC applications; equality constraints; internal power losses; power equipment; power system state estimation; synchronous static compensators; voltage source converter modeling; FACTS devices; STATCOM; VSC-HVDC; state estimation;
Journal_Title :
Power Systems, IEEE Transactions on
DOI :
10.1109/TPWRS.2008.2004821