• DocumentCode
    876403
  • Title

    Soudan 2 Data Acquisition and Trigger Electronics

  • Author

    Dawson, J. ; Laird, R. ; May, E. ; Mondal, N. ; Schlereth, J. ; Solomey, N. ; Thron, J. ; Heppelmann, S.

  • Author_Institution
    Argonne National Laboratory, Argonne, IL 60439
  • Volume
    32
  • Issue
    4
  • fYear
    1985
  • Firstpage
    1353
  • Lastpage
    1356
  • Abstract
    The 1.1 kton Soudan 2 detector is read out by 16K anode wires and 32K cathode strips. Preamps from each wire or strip are bussed together in groups of 8 to reduce the number of ADC channels. The resulting 6144 channels of ionization signal are flash-digitized every 150 ns and stored in RAM. The raw data hit patterns are continually compared with programmable trigger multiplicity and adjacency conditions. The data acquisition process is managed in a system of 24 parallel crates each containing an Intel 8086 microprocessors, which supervises a pipe-lined data compactors, and allows transfer of the compacted data via CAMAC to the host computer. The 8086´s also manage the local trigger conditions and can perform some parallel processing of the data. Due to the scale of the system and multiplicity of identical channels, semi-custom gate array chips are used for much of the logic, utilizing 2.5 micron CMOS technology.
  • Keywords
    Anodes; CMOS logic circuits; CMOS technology; Cathodes; Data acquisition; Detectors; Ionization; Logic arrays; Strips; Wires;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1985.4333610
  • Filename
    4333610