Hybrid-WSI: a massively parallel computing technology?

Author

Habiger, Claw M. ; Lea, R. Mike

Author_Institution

Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK

Volume

26

Issue

4

fYear

1993

fDate

4/1/1993 12:00:00 AM

Firstpage

50

Lastpage

61

Abstract

It is argued that although it is not yet clear which of the two wafer scale integration (WSI) forms, monolithic or hybrid, will gain the lead to an enabling technology for second-generation massively parallel computers (MPCs), there are noticeably more backers for hybrid-WSI. The application requirements, implementation problems, and engineering issues of MPCs are discussed. In particular, the associative string processor (ASP) modules, which comprise building blocks for second-generation MPC configurations, are described. The progress reported in developing ASP modules is quantitatively extrapolated to other MPC implementations.<>

Keywords

VLSI; hybrid integrated circuits; integrated circuit technology; application requirements; associative string processor; enabling technology; engineering issues; hybrid wafer scale integration; implementation problems; massively parallel computing technology; second-generation massively parallel computers; Aerospace industry; Application software; Concurrent computing; Data processing; Geophysics computing; Object detection; Parallel processing; Pipelines; Signal processing; Telecommunication computing;

fLanguage

English

Journal_Title

Computer

Publisher

ieee

ISSN

0018-9162

Type

jour

DOI

10.1109/2.206513

Filename

206513