Title :
Design of Schottky-barrier diode clamped transistor layouts
Author :
Heald, Raymond A. ; Hodges, David A.
fDate :
8/1/1973 12:00:00 AM
Abstract :
Describes an approach to the design of Schottky-clamped integrated circuit transistor layouts. Three-dimensional distributed resistances are modeled using a grid of lumped resistors. A computer circuit analysis program is used to obtain a simple lumped equivalent circuit for the clamped transistor. The equivalent circuit enables accurate prediction of the useful range of d.c. operating conditions for a given structure. An improved small-area clamped transistor layout has been developed using this approach.
Keywords :
Bipolar transistors; Computer-aided circuit design; Equivalent circuits; Monolithic integrated circuits; Schottky-barrier diodes; bipolar transistors; computer-aided circuit design; equivalent circuits; monolithic integrated circuits; Adders; Circuit analysis; Circuit analysis computing; Conductivity; Design methodology; Equivalent circuits; Fabrication; Schottky diodes; Signal design; Signal processing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1973.1050395
