Title :
A 16-Kbit Θ-search associative memory
Author :
Hurson, A.R. ; Miller, Patrick M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Pennyslvania State Univ. University Park, PA, USA
fDate :
4/1/1993 12:00:00 AM
Abstract :
The design of a high-capacity Θ-search associative memory (Θ∈{<,>,⩽,⩾,=≠}) is presented. PSPICE simulation and layouts show that the proposed Θ-search associative memory chip consisting of 256 words, each 64-b long, can fit on a 13.5-mm×9.5-mm chip. It can perform maskable Θ-search operations over its contents in 110 ns
Keywords :
circuit analysis computing; circuit layout CAD; content-addressable storage; 110 ns; 16 Kbit; PSPICE simulation; high-capacity Θ-search associative memory; layouts; Arithmetic; Associative memory; Associative processing; Circuits; Content addressable storage; Costs; Random access memory; Read-write memory; Relational databases; SPICE;
Journal_Title :
Micro, IEEE
