DocumentCode
878271
Title
An 8K B random-access memory chip using the one-device FET cell
Author
Hoffman, William K. ; Kalter, Howard L.
Volume
8
Issue
5
fYear
1973
Firstpage
298
Lastpage
305
Abstract
Describes the design, fabrication, and testing of an 8192-b p-channel fully-functional random access memory. Novel features of this device are discussed. Among these are the following: inversion layer capacitor one-device cell; the use of a high speed buffer to maximize data transfer; and a minimization of cell pitch limitations through the use of a unique word system circuit design. Performance, power, and yields are also discussed.
Keywords
Digital integrated circuits; Random-access storage; Semiconductor storage systems; digital integrated circuits; random-access storage; semiconductor storage systems; Design engineering; Digital circuits; Electrical engineering; FETs; Laboratories; Large scale integration; Random access memory; Read-write memory; Shift registers; Solid state circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1973.1050407
Filename
1050407
Link To Document