• DocumentCode
    878495
  • Title

    Suggestion for an i.c. fast parallel multiplier

  • Author

    De Mori, Renato

  • Author_Institution
    Istituto Elettrotecnico Nazionale `Galileo Ferraris¿, Torino, Italy
  • Volume
    5
  • Issue
    3
  • fYear
    1969
  • Firstpage
    50
  • Lastpage
    51
  • Abstract
    A general method for handling partial products in a parallel multiplier is proposed. It leads to a network of AND gates and full adders, availables as i.c.s which can have an operation time of less than 10 ns per bit of the result.
  • Keywords
    digital arithmetic; digital integrated circuits; multiplying circuits;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19690034
  • Filename
    4210253
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=878495