Applying a composite model to the IC yield problem

The defect density within an integrated circuit slice often exhibits gross variations from area to area. The density may vary from center to periphery, for example, or from side to side. In this paper the composite model is applied empirically to several examples ranging in area from half a slice to many slices. For each example, the total silicon area involved could be divided into as few as two or three subareas. Two methods for accomplishing the decomposition into subareas are described for one example.