DocumentCode :
879494
Title :
A 25-ns read access bipolar 1 kbit TTL RAM
Author :
Mayumi, Hiroshi ; Nokubo, Jyoji ; Okada, Kenji ; Shiba, Hiroshi
Volume :
9
Issue :
5
fYear :
1974
Firstpage :
283
Lastpage :
284
Abstract :
Design considerations are described for a fast and compact 1024-bit TTL RAM based upon the nonsaturating operation of transistors that has small but stable levels and swings by virtue of `digital resistances´. It is well matched with the very fine pattern processes currently achieved both for metalization and diffusion.
Keywords :
Bipolar transistors; Random-access storage; Transistor-transistor logic; bipolar transistors; random-access storage; transistor-transistor logic; Circuit synthesis; Current supplies; Geometry; Impedance; Pattern matching; Power dissipation; Production; Read-write memory; Registers; Resistors;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1974.1050514
Filename :
1050514
Link To Document :
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