Title :
Impact of data cache memory on the single event upset-induced error rate of microprocessors
Author :
Faure, F. ; Velazco, R. ; Violante, M. ; Rebaudengo, M. ; Reorda, M. Sonza
Author_Institution :
TIMA Lab., Grenoble, France
Abstract :
Cache memories embedded in most of complex processors significantly contribute to the global single event upset-induced error rate. Three different approaches allowing the study of this contribution by fault injection are investigated in this paper.
Keywords :
cache storage; radiation hardening (electronics); data cache memory; microprocessors; single event upset-induced error rate; Cache memory; Circuit faults; Circuit testing; Error analysis; Microprocessors; Performance evaluation; Radiation effects; Single event transient; Single event upset; Turning;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2003.821824
