Title :
Comparison of NMOS and PMOS transistor sensitivity to SEU in SRAMs by device simulation
Author :
Castellani-Coulié, K. ; Sagnes, B. ; Saigné, F. ; Palau, J.-M. ; Calvet, M.-C. ; Dodd, P.E. ; Sexton, F.W.
Author_Institution :
Univ. Montpellier, France
Abstract :
The off-NMOS and off-PMOS transistor single-event upset (SEU) sensitivities are studied in a 0.6-μm SRAM. In some cases, the off-PMOS sensitivity is shown to be similar to the off-NMOS one. This could affect SEU rate calculations.
Keywords :
MOS integrated circuits; MOSFET; SRAM chips; radiation hardening (electronics); 0.6 mm; NMOS transistor sensitivity; PMOS transistor sensitivity; SEU; SRAMs; device simulation; CMOS technology; MOS devices; MOSFETs; Neutrons; Particle tracking; Performance evaluation; Protons; Random access memory; Single event upset; Systems engineering and theory;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2003.821583
