Title :
VLSI neuroprocessors for video motion detection
Author :
Lee, Ji-Chien ; Sheu, Bing J. ; Fang, Wai-Chi ; Chellappa, Rama
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fDate :
3/1/1993 12:00:00 AM
Abstract :
The system design of a locally connected competitive neural network for video motion detection is presented. The motion information from a sequence of image data can be determined through a two-dimensional multiprocessor array in which each processing element consists of an analog neuroprocessor. Massively parallel neurocomputing is done by compact and efficient neuroprocessors. Local data transfer between the neuroprocessors is performed by using an analog point-to-point interconnection scheme. To maintain strong signal strength over the whole system, global data communication between the host computer and neuroprocessors is carried out in a digital common bus. A mixed-signal very large scale integration (VLSI) neural chip that includes multiple neuroprocessors for fast video motion detection has been developed. Measured results of the programmable synapse, and winner-takes-all circuitry are presented. Based on the measurement data, system-level analysis on a sequence of real-world images was conducted
Keywords :
VLSI; image sequences; motion estimation; neural chips; parallel processing; signal detection; video signals; 2D multiprocessor array; VLSI neuroprocessors; analog point-to-point interconnection scheme; data transfer; digital common bus; image sequences; locally connected competitive neural network; neural chips; parallel processing; programmable synapse; video motion detection; winner-takes-all circuitry; Data analysis; Data communication; Image analysis; Integrated circuit interconnections; Integrated circuit measurements; Motion detection; Neural network hardware; Neural networks; Semiconductor device measurement; Very large scale integration;
Journal_Title :
Neural Networks, IEEE Transactions on
