Title :
A nonvolatile charge-addressed memory (NOVCAM) cell
Author :
White, Marvin H. ; Lampe, Donald R. ; Fagan, John L. ; Kub, Francis J. ; Barth, Douglas A.
Abstract :
A nonvolatile charge-addressed memory (NOVCAM) cell is described in a 64-bit shift register configuration. The charge address is performed by a charge-coupled device (CCD) shift register and the information is stored in metal-nitride-oxide-silicon (MNOS) nonvolatile sites located in parallel with the CCD shift register. The tunneling electric field strength across the thin-oxide MNOS structure is controlled by the magnitude of the charge transferred from the CCD register. The write, erase, and read modes of operation are discussed with typical /spl plusmn/20 V 10 /spl mu/s write/erase, and 2 V 2 /spl mu/s read conditions. Readout is accomplished by parallel stabilized charge injection from a diffused p/n junction to minimize access time to the first bit.
Keywords :
Charge-coupled devices; Digital integrated circuits; Monolithic integrated circuits; Semiconductor storage systems; Shift registers; charge-coupled devices; digital integrated circuits; monolithic integrated circuits; semiconductor storage systems; shift registers; Capacitance; Capacitors; Charge coupled devices; Dielectrics; Electrodes; Nonvolatile memory; Read-write memory; Shift registers; Threshold voltage; Tunneling;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1975.1050612
