MOS capacitor pull-up circuits for high-speed dynamic logic

The use of an MOS capacitor as an integrated load element in dynamic inverters is reviewed and a particular approach (direct cascading) to its application is demonstrated. Experimental n-channel capacitor pull-up shift registers are demonstrated to operate with multiphase clocks at frequencies up to 34.5 MHz, which is about twice the limit of conventional MOS dynamic circuits fabricated with the same Si-gate process. A substrate bias is used to eliminate minority carrier injection which was previously reported to limit the high frequency performance. Possible applications of this circuit are discussed.