Title :
A high-speed ESFI SOS programmable logic array with an MNOS version
Author :
Horninger, Karlheinrich
Abstract :
A programmable logic array (PLA) with J-K flip-flops as feedback loops and having a maximum operating speed of 12 MHz has been designed and realized in epitaxial-silicon-films-on-insulators (ESFI) silicon-on-sapphire (SOS) technology. The advantages of the ESFI SOS technology and the circuit of the PLA are described and experimental results are presented. In addition, a twin PLA using metal-nitride-oxide-semiconductor (MNOS) transistors in the AND and OR matrices and having the same number of inputs, outputs, and feedback loops as the mask-programmable PLA has been designed. This MNOS PLA has full on-chip decoding capability and can be programmed or reprogrammed individually. The circuit of the MNOS PLA is described and the speed of the device is calculated.
Keywords :
Digital integrated circuits; Logic circuits; Monolithic integrated circuits; digital integrated circuits; logic circuits; monolithic integrated circuits; Decoding; Equations; Feedback loop; Integrated circuit technology; Logic circuits; Logic design; Logic programming; Production; Programmable logic arrays; Read only memory;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1975.1050619
