DocumentCode :
880683
Title :
A Realization Procedure for Threshold Gate Networks
Author :
Coates, C.L. ; Lewis, P.M., II
Author_Institution :
University of Texas, Austin, Tex.
Issue :
5
fYear :
1963
Firstpage :
454
Lastpage :
461
Abstract :
One engineering parameter of importance in the realization of threshold gate networks is the tolerance which must be placed on the coefficients and threshold of the individual components. A previous paper gives a realization procedure which allows this tolerance to be controlled. The present paper gives an alternate realization procedure which also allows the tolerance to be controlled, but which is somewhat different in its application. The new procedure can be considered to be a generalization of an earlier procedure for the single-element realization problem. The function is first decomposed using a generalization of the function tree and then reconstructed using a generalization of the range theorem plus some additional simplification theorems.
Keywords :
Boolean algebra; Circuit synthesis; Fluctuations; Integrated circuit interconnections; Laboratories; Logic circuits; Logic design; Logic devices; Logic functions; Switching circuits;
fLanguage :
English
Journal_Title :
Electronic Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0367-7508
Type :
jour
DOI :
10.1109/PGEC.1963.263625
Filename :
4037957
Link To Document :
بازگشت