Title :
General Synthesis of Tributary Switching Networks
Author_Institution :
RCA Laboratories, Princeton, N. J.
Abstract :
A synthesis procedure is described which generates all tributary networks (TRIBs) realizing a given truth function when no a priori assignment of the variables to input terminals is specified. If the truth function is not known to be realizable by a TRIB structure, the synthesis procedure provides a convenient test for TRIB realizability. If the variables are preassigned to input terminals, the synthesis and test are still applicable and correspondingly shorter. A major tool of the procedure is the matrix of binary representations of the minterms of the truth function¿the so called ``minterm matrix.´´ The procedure is illustrated by a numerical example.
Keywords :
Adders; Control system synthesis; Diodes; Equations; Industrial control; Instruments; Logic circuits; Logic design; Network synthesis; Switching circuits;
Journal_Title :
Electronic Computers, IEEE Transactions on
DOI :
10.1109/PGEC.1963.263627