DocumentCode
880719
Title
Computer-aided device modeling and design procedure for current hogging logic (CHL)
Author
Wieder, Armin W. ; Engl, Walter L. ; Lehning, Heinz
Volume
10
Issue
5
fYear
1975
fDate
10/1/1975 12:00:00 AM
Firstpage
352
Lastpage
359
Abstract
Modeling of functional devices requires computer simulation of lateral and vertical device structure due to geometrical complexity. It not only must meet the requirements of network analysis programs, but also has to enable quantitative design. For the basic element of current hogging logic (CHL), the computer simulation of the two-dimensional situation has resulted in and given justification for a simple model approximating the injection performance and enabling quantitative design of even complex CHL circuits.
Keywords
Computer-aided logic design; Digital integrated circuits; Monolithic integrated circuits; computer-aided logic design; digital integrated circuits; monolithic integrated circuits; Circuit noise; Delay effects; Isolation technology; Logic circuits; Logic design; Logic devices; Semiconductor device noise; Semiconductor memory; Solid modeling; Solid state circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1975.1050623
Filename
1050623
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