Title :
Computer-aided device modeling and design procedure for current hogging logic (CHL)
Author :
Wieder, Armin W. ; Engl, Walter L. ; Lehning, Heinz
fDate :
10/1/1975 12:00:00 AM
Abstract :
Modeling of functional devices requires computer simulation of lateral and vertical device structure due to geometrical complexity. It not only must meet the requirements of network analysis programs, but also has to enable quantitative design. For the basic element of current hogging logic (CHL), the computer simulation of the two-dimensional situation has resulted in and given justification for a simple model approximating the injection performance and enabling quantitative design of even complex CHL circuits.
Keywords :
Computer-aided logic design; Digital integrated circuits; Monolithic integrated circuits; computer-aided logic design; digital integrated circuits; monolithic integrated circuits; Circuit noise; Delay effects; Isolation technology; Logic circuits; Logic design; Logic devices; Semiconductor device noise; Semiconductor memory; Solid modeling; Solid state circuits;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1975.1050623
