Title :
Analytical delay model of CMOS inverter including channel-length modulation
Author :
Chow, H.-C. ; Feng, Wu-Shiung
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
An analytical delay model of a CMOS inverter is introduced for the first time which includes channel-length modulation, source-drain resistance and high-field effects. Calculations of the rise, fall and delay times show good agreement with SPICE simulations.
Keywords :
CMOS integrated circuits; delays; high field effects; logic gates; semiconductor device models; CMOS inverter; channel-length modulation; delay model; delay times; fall time; high-field effects; rise time; source-drain resistance;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19920256
