A JFET/bipolar eight-channel analog multiplexer

Describes the design and fabrication of the first of a new generation of analog multiplexers using the bipolar/ionimplanted JFET process. The switch configuration used is especially suited to this process, and consequently results in a moderate size bipolar IC. The design of the switch, aided by the process characteristics, produces a high-performance monolithic multiplexer which can withstand input signals of greater than the power supplies and does not require special care in handling. A high degree of optimization is attained in the design of the bias circuits, and this plays a major role in achieving high fabrication yield, and subsequently low production costs.