Title :
A precision trim technique for monolithic analog circuits
Abstract :
A technique for permanent adjustment of precision analog circuits at wafer test by selective shorting of Zener diodes is presented. Analytical details of the trimming procedure and a physical description of diode short-circuiting are given. The method is applied to a precision operational amplifier with input offset voltage reduced to 10 /spl mu/V. The necessity of optimizing other related parameters is demonstrated. Practical considerations limiting wafer test accuracy are discussed. Circuit performance is summarized.
Keywords :
Integrated circuit production; Linear integrated circuits; Monolithic integrated circuits; Operational amplifiers; Optimisation; integrated circuit production; linear integrated circuits; monolithic integrated circuits; operational amplifiers; optimisation; Analog circuits; Circuit testing; Costs; Diodes; Fuses; Manufacturing; Operational amplifiers; Optimization methods; Resistors; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1975.1050635
