Experimental 150 Mb/s 256×128 switch

The authors describe a 256 input×128 output 150 Mb/s experimental space switch. The switch consists of forty 64×16 2-μm CMOS switch chips using six layers of interconnection. The switch design, implementation, and experiments provide information on the feasibility of expanding 64×16 switch chip modules to larger configurations of inputs and outputs. The architecture, operation, and comparisons to crosstalk theory are described. Issues relating to chip interconnectability, crosstalk, input/output delay variation, switching speed, and other performance parameters are discussed