DocumentCode

881056

Title

Topological interpretation of ladder network formulas

Author

Ramachandran, Vivek

Volume

54

Issue

4

fYear

1966

fDate

4/1/1966 12:00:00 AM

Firstpage

700

Lastpage

701

Keywords

Circuit synthesis; Circuit theory; Impedance; Inspection; Laboratories; Matrices; Network synthesis; Research and development; Resistors; Tree graphs;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/PROC.1966.4820

Filename

1446750