• DocumentCode
    88167
  • Title

    Synergy of Dynamic Frequency Scaling and Demotion on DRAM Power Management: Models and Optimizations

  • Author

    Yanchao Lu ; Bingsheng He ; Xueyan Tang ; Minyi Guo

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Shanghai Jiao Tong Univ., Shanghai, China
  • Volume
    64
  • Issue
    8
  • fYear
    2015
  • fDate
    Aug. 1 2015
  • Firstpage
    2367
  • Lastpage
    2381
  • Abstract
    Main memory (or DRAM) is one of the most significant components to the computer system´s performance and energy consumption. Dynamic frequency scaling (DFS) and DRAM low-power states (Demotion) are two main-stream techniques for DRAM power management. DFS reduces the operation frequency of memory channels and DRAM devices when the memory bandwidth is under-utilized, whereas demotion transits individual memory ranks to low-power states during long idle periods. Despite that there have been fruitful research work for DFS and demotion separately, little attention has been paid to the synergy between these two techniques. To bridge this gap, this paper conducts a comprehensive study on the synergy between DFS and demotion. In particular, we leverage queuing theory to develop analytical models for the energy consumption and performance of DRAM systems with DFS and demotion. These models provide valuable insights into the synergy between DFS and demotion. We further attempt to minimize the energy consumption by considering both DFS and demotion while keeping a pre-defined performance penalty budget. To reduce the optimization complexity, we develop simple yet effective heuristics to search near-optimum DFS-demotion configurations. We experimentally compare our design with other state-of-the-art DRAM energy saving policies using detailed simulations of a large set of workloads. Experimental results show the accuracy of our analytical models and the effectiveness of our optimizations.
  • Keywords
    DRAM chips; computational complexity; energy consumption; optimisation; power aware computing; DFS; DRAM energy saving policies; DRAM low-power states; DRAM power management; demotion; dynamic frequency scaling; energy consumption; main memory; memory bandwidth; memory channels; operation frequency; optimization complexity; predefined performance penalty budget; Analytical models; Energy consumption; Memory management; Optimization; Power demand; Random access memory; Time-frequency analysis; Demotion; Dynamic frequency scaling; Energy consumption; In-memory processing; Main memory systems; dynamic frequency scaling; energy consumption; in-memory processing; main memory systems;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2014.2360534
  • Filename
    6911963