High-performance single polysilicon EEPROM with stacked MIM capacitor

High-performance single polysilicon electrically erasable programmable read-only memories (EEPROMs) with stacked metal-insulator-metal capacitor as a control gate are investigated. The thickness of the tunnel oxide and the length of the floating gate channel of the fabricated devices were 52 /spl Aring/ and 0.24 μm, respectively. The effective control gate coupling ratio of the proposed EEPROM cell was higher than that of cells with n-well control gate because of the absence of depletion capacitance in the n-well silicon region. The experimental results showed that the program speed of the proposed cells were faster than those of the conventional n-well control gate cells. In addition, the proposed cells had threshold voltage shifts of 3.5 V between program and erase states. Furthermore, there were threshold voltage shifts of 3.0 V without degradation of the read currents after 1000 program/erase cycles.