VMOS ROM

A new v-groove MOS (VMOS) read-only memory (ROM) is presented. The static 16-kbit ROM operates from a single 5-V supply, features typical and worst case access times of 160 ns and 200 ns, respectively, and has a die size of 120×140 mil/SUP 2/ using 6-μm design rules. The purposes for fabricating the VMOS ROM are to demonstrate the large-scale integration (LSI) yield feasibility of the VMOS process, and to provide a vehicle for widely varying circuit and process experiments. It is estimated on the basis of experimental data that two new VMOS process techniques, called `linear´ and `self-aligned´ VMOS, will reduce the 16-kbit ROM die size to 100×120 mil/SUP 2/ (6-μm rules).