DocumentCode
882550
Title
A 16-kbit nonvolatile charge addressed memory
Author
Fagan, John L. ; White, Marvin H. ; Lampe, Donald R.
Volume
11
Issue
5
fYear
1976
Firstpage
631
Lastpage
636
Abstract
A 16-kbit nonvolatile charge addressed memory (NOVCAM) is described. A unique cell design allows a high-density memory array layout without reduced line widths or spacings. A cell size of 0.5 square mils is produced by a seven mask process with 6-/spl mu/m polysilicon gates, 10-/spl mu/m aluminum gates, and 10-/spl mu/m minimum spacing on all mask levels. Charge addressed write and read operations are implemented with a very simple interface between the memory array and a two-phase dynamic shift register. The memory is organized as 256 columns by 64 rows. Two 64-bit shift registers provide data access to the memory array via a 2:1 column decoder. With single polysilicon processing the memory array is 50/spl times/161 mils; the 16-kbit chip is 131/spl times/200 mils.
Keywords
Charge-coupled devices; Digital integrated circuits; Monolithic integrated circuits; Semiconductor storage devices; charge-coupled devices; digital integrated circuits; monolithic integrated circuits; semiconductor storage devices; Aluminum; Capacitors; Charge coupled devices; Circuits; Dielectrics; Nonvolatile memory; Random access memory; Read-write memory; Shift registers; Tunneling;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1976.1050791
Filename
1050791
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