Improved feedback ECL gate with low delay-power product for the subnanosecond region

Feedback ECL gates are well suited as basic elements for high-speed LSI circuits. Unfortunately for higher voltage swings, they have a hysteresis which reduces the noise immunity. Here it will be demonstrated theoretically how to remove the hysteresis and how to optimize the transfer characteristic using emitter resistors. For such a gate, a power dissipation of 1.6 mW and a propagation delay time of less than 0.6 ns are evaluated by simulation using the parameters of today´s available technologies.