DocumentCode :
883333
Title :
Physical models for degradation effects in polysilicon thin-film transistors
Author :
Hack, Michael ; Lewis, Alan G. ; Wu, I-Wei
Author_Institution :
Xerox Palo Alto Res. Center, CA, USA
Volume :
40
Issue :
5
fYear :
1993
fDate :
5/1/1993 12:00:00 AM
Firstpage :
890
Lastpage :
897
Abstract :
Experimental data showing the degradation in performance of polysilicon thin-film transistors (TFTs) under a variety of bias stress conditions are presented. A model is proposed to explain these effects whereby device performance degrades due to changes in the effective density of defect states in the material. Unlike single-crystal devices which degrade from hot-carrier effects, poly-Si TFTs are believed to degrade primarily due to the presence of high carrier densities in the channel. Good agreement between computer simulations of the device characteristics and experimental data ia demonstrated. It is shown that stressing under transient conditions leads to a more severe performance degradation than stressing under comparable steady-state conditions
Keywords :
carrier density; defect electron energy states; elemental semiconductors; semiconductor device models; semiconductor device testing; silicon; thin film transistors; Si-SiO2; TFTs; bias stress conditions; computer simulations; degradation effects; density of defect states; high carrier densities; physical model; polysilicon thin-film transistors; steady-state conditions; transient conditions; Charge carrier density; Computer hacking; Degradation; Grain boundaries; Hot carrier effects; MOS devices; Silicon; Stress; Temperature; Thin film transistors;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.210195
Filename :
210195
Link To Document :
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