• DocumentCode
    883416
  • Title

    Influence of Si nanocrystal distributed in the gate oxide on the MOS capacitance

  • Author

    Ng, C.Y. ; Chen, T.P. ; Ding, L. ; Yang, M. ; Wong, J.I. ; Zhao, P. ; Yang, X.H. ; Liu, K.Y. ; Tse, M.S. ; Trigg, A.D. ; Fung, S.

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
  • Volume
    53
  • Issue
    4
  • fYear
    2006
  • fDate
    4/1/2006 12:00:00 AM
  • Firstpage
    730
  • Lastpage
    736
  • Abstract
    In this paper, the authors have studied the influence of silicon nanocrystal (nc-Si) distributed in the gate oxide on the capacitance for the circumstances that the nc-Si does not form conductive percolation tunneling paths connecting the gate to the substrate. The nc-Si is synthesized by Si-ion implantation. The effective dielectric constant of the gate oxide in the nc-Si distributed region is calculated based on a sublayer model of the nc-Si distribution and the Maxwell-Garnett effective medium approximation. After the depth distribution of the effective dielectric constant is obtained, the MOS capacitance is determined. Two different nc-Si distributions, i.e., partial and full nc-Si distributions in the gate oxide, have been considered. The MOS capacitance obtained from the modeling has been compared to the capacitance measurement for a number of samples with various gate-oxide thicknesses, implantation energies and dosages, and an excellent agreement has been achieved for all the samples. A detailed picture of the influence of implantation energy and implantation dosage on the MOS capacitance has been obtained.
  • Keywords
    MOS capacitors; elemental semiconductors; ion implantation; nanostructured materials; permittivity; semiconductor device models; silicon; MOS capacitance; Si; capacitance measurement; conductive percolation tunneling paths; dielectric constant; gate oxide thickness; ion implantation; silicon nanocrystal; Annealing; CMOS process; Capacitance measurement; Dielectric constant; Dielectric substrates; Fabrication; Joining processes; Nanocrystals; Silicon; Tunneling; Dielectric constant; MOS capacitance; silicon nanocrystal;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2006.870872
  • Filename
    1610903