Simulating single-event burnout of n-channel power MOSFET´s

Author

Johnson, Gregory H. ; Hohl, Jakob H. ; Schrimpf, Ronald D. ; Galloway, Kenneth F.

Author_Institution

Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA

Volume

40

Issue

5

fYear

1993

fDate

5/1/1993 12:00:00 AM

Firstpage

1001

Lastpage

1008

Abstract

Single-event burnout of power MOSFETs is a sudden catastrophic failure mechanism that is initiated by the passage of a heavy ion through the device structure. The passage of the heavy ion generates a current filament that locally turns on a parasitic n-p-n transistor inherent to the power MOSFET. Subsequent high currents and high voltage in the device induce second breakdown of the parasitic bipolar transistor and hence meltdown of the device. This paper presents a model that can be used for simulating the burnout mechanism in order to gain insight into the significant device parameters that most influence the single-event burnout susceptibility of n-channel power MOSFETs

Keywords

impact ionisation; insulated gate field effect transistors; ion beam effects; power transistors; semiconductor device models; transients; DMOS cell; avalanche multiplication factor; catastrophic failure mechanism; current filament; heavy ion passage; high currents; high voltage; meltdown; model; n-channel power MOSFETs; parasitic n-p-n transistor; second breakdown; single-event burnout; Bipolar transistors; Breakdown voltage; Current density; Electrons; Failure analysis; Feedback; MOSFET circuits; Plugs; Power generation; Switches;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.210211

Filename

210211