• DocumentCode
    883720
  • Title

    A new efficient memoryless residue to binary converter

  • Author

    Andraos, Sweidan ; Ahmad, Hiasat

  • Author_Institution
    Dept. of Electr. Eng., Jordan Univ., Amman, Jordan
  • Volume
    35
  • Issue
    11
  • fYear
    1988
  • Firstpage
    1441
  • Lastpage
    1444
  • Abstract
    An algorithm is described which converts the moduli (2/sup k/+1, 2/sup k/, 2/sup k/-1) residue numbers into their binary equivalent. A hardware implementation for this algorithm was constructed using binary adders only. The proposed algorithm and its implementation have the following advantages: (1) it enables an extremely wide fixed-point dynamic range, since its upper bound is not limited by a memory size; (2) it requires only four binary adders, two of which are operating in parallel; consequently, its conversion speed is higher than any similar reported converter, and its integrated circuit implementation would occupy less area; and (3) novel compact forms of the multiplicative inverses for the above moduli set are introduced.<>
  • Keywords
    code convertors; digital arithmetic; digital circuits; RNS/binary system conversion; binary adders; hardware implementation; memoryless residue to binary converter; multiplicative inverses; Adders; Dynamic range; Hardware; High speed integrated circuits; Upper bound;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/31.14470
  • Filename
    14470