Title :
Correlation of fabrication process and electrical device parameter variations
Author :
Dutton, Robert W. ; Divekar, Dileep A. ; Gonzalez, Adalberto G. ; Hansen, Stephen E. ; Antoniadis, Dimitri A.
fDate :
8/1/1977 12:00:00 AM
Abstract :
A program for modelling IC fabrication processes is described. Simulated and measured impurity profiles are shown for a bipolar transistor technology. These profiles are used to study the sensitivity of electrical device parameters to process variations. A comparison of simulated device performance using process models gives parameters which bracket measured results for 35 die across a wafer. A statistical model is given which relates twelve parameters to the base transport current.
Keywords :
Bipolar integrated circuits; Digital simulation; Semiconductor device models; bipolar integrated circuits; digital simulation; semiconductor device models; Circuit simulation; Electric variables measurement; Fabrication; Impurities; Integrated circuit modeling; MOS integrated circuits; Semiconductor device modeling; Solid modeling; Statistics; Time of arrival estimation;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1977.1050913
