Title :
A metallisation providing two levels of interconnect for beam-leaded silicon integrated circuits
Author :
Ryden, W.D. ; Labuda, E.F.
Abstract :
A two-level-metal structure is described for beam-leaded silicon integrated circuits. The two-level structure consists of a Ti-Pt first level, plasma-deposited silicon nitride as interlevel dielectric, and Ti-Pt-Au as a second level. The Ti-Pt layers of both levels are sputter deposited. Sputter etching is used for pattern definition of the Pt layer of the first level and the Pt-Au layers of the second level. Two examples are presented of the application of the structure to bipolar integrated circuits. One is a LSI circuit consisting of a 24/spl times/9-bit sequential access memory implemented in a Schottky I/SUP 2/L technology and the other is a seven-gate inverter implemented in a standard buried collector technology.
Keywords :
Beam-lead devices; Bipolar integrated circuits; Metallisation; beam-lead devices; bipolar integrated circuits; metallisation; Bipolar integrated circuits; Dielectrics; Integrated circuit interconnections; Integrated circuit technology; Inverters; Large scale integration; Metallization; Plasma applications; Silicon; Sputter etching;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1977.1050917
