Dual depletion CMOS (D/sup 2/CMOS) static memory cell

A new type of static memory cell-dual depletion CMOS (D/SUP 2/MOS)-has been designed and fabricated using SOS wafers by the conventional CMOS/SOS technology. In contrast to the conventional CMOS static memory cell, which comprises six transistors, the new cell consists merely of four transistors and one data-line so that the cell area can be significantly reduced.