• DocumentCode
    884015
  • Title

    CMOS analogue current-steering multiplier

  • Author

    Botha, T.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Pretoria Univ., South Africa
  • Volume
    28
  • Issue
    6
  • fYear
    1992
  • fDate
    3/12/1992 12:00:00 AM
  • Firstpage
    525
  • Lastpage
    526
  • Abstract
    A four-quadrant multiplier circuit for realisation in CMOS is proposed and compromises between characteristics of the design are discussed. The design is optimised for use in the analogue VLSI implementation of neutral networks and the results presented demonstrate that the circuit complies with the requirements of this application.
  • Keywords
    CMOS integrated circuits; VLSI; linear integrated circuits; multiplying circuits; neural nets; CMOS analogue current-steering multiplier; analogue VLSI; four-quadrant multiplier circuit; neutral networks;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19920331
  • Filename
    126477
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=884015