Title :
Decompositions of Logical Functions Using Majority Decision Elements
Author_Institution :
Electronic Engineering Dept., Tokyo Institute of Technology, Tokyo, Japan.
Abstract :
A method of decomposing logical functions using three input majority gates is given. This method requires that at least one of the inputs to the gate be specified, and from this the other inputs may be found. For unate functions one of the variables may be completely separated at each level. A method using a Karnaugh map is proposed for finding the best function to use as the specified input, which will make the other inputs to the majority gate easier to synthesize.
Keywords :
Adaptive systems; Computer aided manufacturing; Contracts; Diodes; Instruments; Logic arrays; Mathematics; Network synthesis; Sequential circuits;
Journal_Title :
Electronic Computers, IEEE Transactions on
DOI :
10.1109/PGEC.1964.263903