DocumentCode
884264
Title
Frequency dividers by Schottky coupled I/sup 2/L gates
Author
Iizuka, Tetsuya
Volume
12
Issue
5
fYear
1977
Firstpage
530
Lastpage
532
Abstract
A frequency dividing cell composed of four I/SUP 2/L gates and two Schottky diodes is proposed and analyzed. The cells are connected by one I/O line. n-p-n transistors need only two collectors. Simulation of the circuit with I/SUP 2/L gates of 3.2 ns/gate predicts the operating frequency up to 80 MHz. The operating frequency of 33 MHz was observed using a circuit built by discrete I/SUP 2/L gates with minimum propagation delay of 7.5 ns/gate and Schottky diodes.
Keywords
Bipolar integrated circuits; Frequency dividers; Integrated logic circuits; bipolar integrated circuits; frequency dividers; integrated logic circuits; Coupling circuits; Frequency conversion; Logic circuits; MOS integrated circuits; Power dissipation; Schottky diodes; Semiconductor devices; Solid state circuits; Threshold voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1977.1050948
Filename
1050948
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