• DocumentCode
    884349
  • Title

    A Monte Carlo based circuit-level methodology for algorithmic design of MOS LSI static random logic circuits

  • Author

    Puri, Yogishwar

  • Volume
    12
  • Issue
    5
  • fYear
    1977
  • Firstpage
    560
  • Lastpage
    565
  • Abstract
    A Monte Carlo analysis is presented for the design of input gates in MOS LSI custom static random logic circuits implemented in NORs, NANDs, AOIs, OAIs, etc. The design approach is algorithmic and suited for CAD applications in multi-part-number logic chip design. The algorithms are derived and their usage illustrated for Weinberger chip layouts using circuit-level approximations, assumptions, and criteria.
  • Keywords
    Circuit CAD; Field effect integrated circuits; Integrated logic circuits; Large scale integration; Monte Carlo methods; circuit CAD; field effect integrated circuits; integrated logic circuits; large scale integration; Algorithm design and analysis; Contact resistance; Design automation; Design methodology; Design optimization; FETs; Large scale integration; Logic circuits; Logic design; Monte Carlo methods;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1977.1050955
  • Filename
    1050955
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=884349